THERMAL SCIENCE

International Scientific Journal

Authors of this Paper

External Links

AN ANALYTICAL THERMAL MODEL FOR THE 3-D INTEGRATED CIRCUIT WITH NEW-TYPE THROUGH SILICON VIA

ABSTRACT
Through silicon via technology is a promising and preferred way to realize the reliable interconnection for 3-D integrated circuit (3-D IC), which can transfer heat from multiple dies to the heat sink in vertical direction. In this paper, a new gen¬eral model of the through-silicon via (TSV) is proposed to investigate the thermal performance of the 3-D IC. The heat transfer characteristics of conical-annular TSV are studied for the first time. The impacts of different sidewall inclination angles and insulating layer thicknesses of TSV on the heat dissipation of 3-D IC were compared and analyzed in detail. As expected, our proposed model is in good agreement with the results of the existing models, which shows that the proposed model considering the lateral heat transfer and TSV structures can predict the distribution of temperature more efficiently and accurately. Furthermore, it is found that conical-annular TSV has more excellent heat dissipation performance.
KEYWORDS
PAPER SUBMITTED: 2022-06-21
PAPER REVISED: 2022-08-01
PAPER ACCEPTED: 2022-08-08
PUBLISHED ONLINE: 2022-09-10
DOI REFERENCE: https://doi.org/10.2298/TSCI220621140X
CITATION EXPORT: view in browser or download as text file
THERMAL SCIENCE YEAR 2023, VOLUME 27, ISSUE Issue 3, PAGES [2391 - 2398]
REFERENCES
  1. Wang, K. J. and Pan, Z. L., An Analytical Model for Steady-State and Transient Temperature Fields in 3-D Integrated Circuits, IEEE Trans. Packag., Manuf. Technol., 6 (2016), 7, pp. 1026-1039
  2. Wang, K. J., et al., Thermal Management of the Hot spots in 3-D Integrated Circuits, Thermal Science, 22 (2018), 4, pp. 1685-1690
  3. Yoon, J. K., et al., Thermal Characterization of Interlayer Microfluidic Cooling of Three-Dimensional Integrated Circuits with Nonuniform Heat Flux, Journal of Heat Transfer, 132 (2010), 4, pp. 04100 9041018
  4. Z. Ren and J. Lee, Thermal Conductivity Anisotropy in Holey Silicon Nanostructures and Its Impact on Thermoelectric Cooling, Nanotechnology, 29 (2018), 4, pp. 045-404
  5. Koo, J. M., et al., Integrated Microchannel Cooling for Three-Dimensional Electronic Circuit Architectures, Heat Transf., 127 (2005), 1, pp. 49-58
  6. Lin, S. C. and Banerjee, K., Cool Chips: Opportunities and Implications for Power and Thermal Management, IEEE Trans. Electron Devices., 55 (2008), 1, pp. 245-255
  7. Muzychka, Y. S., et al., Thermal Spreading Resistance and Heat Source Temperature in Compound Orthotropic Systems with Interfacial Resistance, IEEE Trans. Compon., Packag., Manuf. Technol., 3 (2013), 11, pp. 1826-1841
  8. Choobineh, L. and Jain, A., Analytical Solution for Steady-State and Transient Temperature Fields in Vertically Stacked , IEEE Trans. Compon., Packag., Manuf. Technol., 2 (2012), 12, pp. 2031-2039
  9. Bagnall, K. R., et al., Analytical Solution for Temperature Rise in Complex Multi-layer Structures with Discrete Heat Sources, IEEE Trans. Compon., Packag., Manuf. Technol., 4 (2014), 5, pp. 817-830
  10. Meindl, J. D., Beyond Moore's Law: the interconnect era, Computing in Science & Engineering, 5 (2003), 1, pp. 20-24
  11. T. Lu., et al., TSV-Based 3-D ICs: Design Methods and Tools, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 36 (2017), 10, pp. 1593-1619
  12. Zhu, Z. M., et al., An Analytical Thermal Model for 3D Integrated Circuit Considering Through Silicon Via, Acta Phys. Sin., 60 (2011). 11, pp. 118-401
  13. Qian, L. B., et al., Through Silicon Via Insertion for Performance Optimization in Three-dimensional Integrated Circuits, Microelectronics Journal, 43 (2012), 2, pp. 128-133
  14. Park, M., et al., Evaluation of Si Liquid Cooling Structure with Micro-channel and TSV for 3D Application. Microsyst Technol, 23 (2017), 5, pp. 2609-2614
  15. Chen,Y., et al., Through silicon via aware design planning for thermally efficient 3-D integrated circuits, IEEE Trans. Comput.-Aided Design Integr. Circuits Syst., 32 (2013), 9, pp. 1335-1346
  16. Z. Liu., et al., Compact Lateral Thermal Resistance Model of TSVs for Fast Finite-Difference Based Thermal Analysis of 3-D Stacked ICs, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 33 (2014), 10, pp. 1490-1502
  17. Ren, Z. Q., et al., Thermal TSV Optimization and Hierarchical Floorplanning for 3-D Integrated Circuits, IEEE Trans. Compon., Packag., Manuf. Technol., 10 (2020), 4, pp. 599-610
  18. Xu, P., et al., Thermal Model for 3-D Integrated Circuits with Integrated Mlgnr-Based, Thermal Science, 24 (2020), 3B, pp. 2067-2075
  19. Y. Ding., et al., Study on High Frequency Characterizations of Coaxially Shielded TSV with Mixed Dielectric Layer, Transactions of Beijing Institution of Technology, 41 (2021), 10, pp. 1103-1108
  20. S. Wang., Parasitic Parameter Extraction and Equivalent Circuit Establishment of Novel Through Silicon Vias. Xidian University, China, 2017
  21. L. B. Qian., et al., Through Silicon Via Insertion for Performance Optimization in Three Dimensional Integrated Circuits, Microelectronics Journal, 43 (2012), 2, pp. 128-133
  22. LI X., et al., Graphene Heat Dissipation Film for Thermal Management of Hot Spot in Electronic Device, Journal of Materials Science Materials in Electronics, 27 (2016), 7, pp. 7715-7721

© 2024 Society of Thermal Engineers of Serbia. Published by the Vinča Institute of Nuclear Sciences, National Institute of the Republic of Serbia, Belgrade, Serbia. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution-NonCommercial-NoDerivs 4.0 International licence