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THERMAL MANAGEMENT OF THE THROUGH SILICON VIAS IN 3-D INTEGRATED CIRCUITS

ABSTRACT
The through silicon via technology is a promising and preferred way to realize the reliable interconnection for 3-D integrated circuit integration. However, its size and the property of the filled-materials are two factors affecting the thermal behavior of the integrated circuits. In this paper, we design 3-D integrated circuits with different through silicon via models and analyze the effect of different material-filled through silicon vias, aspect ratio and thermal conductivity of the dielectric on the steady-state temperature profiles. The results presented in this paper are expected to aid in the development of thermal design guidelines for through silicon vias in 3-D integrated circuits.
KEYWORDS
PAPER SUBMITTED: 2018-02-20
PAPER REVISED: 2018-11-25
PAPER ACCEPTED: 2018-11-26
PUBLISHED ONLINE: 2019-09-14
DOI REFERENCE: https://doi.org/10.2298/TSCI1904157W
CITATION EXPORT: view in browser or download as text file
THERMAL SCIENCE YEAR 2019, VOLUME 23, ISSUE 4, PAGES [2157 - 2162]
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© 2020 Society of Thermal Engineers of Serbia. Published by the Vinča Institute of Nuclear Sciences, Belgrade, Serbia. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution-NonCommercial-NoDerivs 4.0 International licence